AME8500BEFTAE46 AME8500BEFTAD28 AME8500BEFTAD44 pdf datasheet:
http://www.chinaicmart.com/series-AME/AME8500BEFTAE46.html Functional Description
The CY62128V family is composed of three high-performance CMOS static RAMs organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE ), an active HIGH Chip Enable (CE ), an active 1 2?LOW Output Enable (OE) and three-state drivers. These devices have an automatic power-down feature, reducing the power consumption by over 99% when deselected. The CY62128V family is available in the standard 450-mil-wideSOIC, 32-lead TSOP-I, and STSOP packages.Writing to the device is accomplished by taking Chip Enable one (CE ) and Write Enable (WE) inputs LOW and the Chip 1 Enable two (CE ) input HIGH. Data on the eight I/O pins (I/O 2 0through I/O ) is then written into the location specified on the 7address pins (A through A ). 0 16 Reading from the device is accomplished by taking Chip Enable one (CE ) and Output Enable (OE) LOW while forcing 1 Write Enable (WE) and Chip Enable two(CE ) HIGH. Under 2 these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.The eight input/output pins (I/O through I/O ) are placed in a 0 7 high-impedance state when the device is deselected (CE 1 HIGH or CE LOW), the outputs are disabled (OE HIGH), or 2 during a write operation (CE LOW, CE HIGH, and WE LOW).elicoco
May 25, 2008, 08:48:18 PM
